As an Amazon Associate I earn from qualifying purchases from

Gradual Ramp, Enormous Investments, Large Future

Final week, TSMC issued their This autumn and full-year 2022 earnings reviews for the corporate. Moreover confirming that TSMC was closing out a really busy, very worthwhile yr for the world’s high chip fab – reserving nearly $34 billion in internet earnings for the yr – the end-of-year report from the corporate has additionally given us a recent replace on the state of TSMC’s numerous fab initiatives.

The massive information popping out of TSMC for This autumn’22 is that TSMC has initiated excessive quantity manufacturing of chips on its N3 (3nm-class) fabrication know-how. The ramp of this node might be moderately sluggish initially as a result of excessive design prices and the complexities of the primary N3B implementation of the node, so the world’s largest foundry doesn’t anticipate it to be a major contributor to its income in 2023. But, the agency will make investments tens of billions of {dollars} in increasing its N3-capable manufacturing capability as finally N3 is expected to become a popular long-lasting family of production nodes for TSMC.

Gradual Ramp Initially

“Our N3 has efficiently entered quantity manufacturing in late fourth quarter final yr as deliberate, with good yield,” stated C. C. Wei, chief govt of TSMC. “We anticipate a clean ramp in 2023 pushed by each HPC and smartphone functions. As our prospects’ demand for N3 exceeds our skill to provide, we anticipate the N3 to be totally utilized in 2023.”

Holding in thoughts that TSMC’s capital expenditures in 2021 and 2022 have been centered totally on increasing its N5 (5nm-class) manufacturing capacities, it’s not stunning that the corporate’s N3-capable capability is modest. In the meantime, TSMC doesn’t anticipate N3 to account for any sizable share of its income earlier than Q3.

The truth is, the No. 1 foundry expects N3 nodes (which embody each baseline N3 and relaxed N3E that’s set to enter HVM within the second half of 2023) to account for perhaps 4% – 6% of the corporate’s wafer income in 2023. And but this might exceed the contribution of N5 in its first two quarters of HVM in 2020 (which was about $3.5 billion).

“We anticipate [sizable N3 revenue contribution] to start out in third quarter 2023 and N3 will contribute mid-single-digit proportion of our complete wafer income in 2023,” stated Wei. “We anticipate the N3 income in 2023 to be greater than N5 income in its first yr in 2020.”

Many analysts consider that the baseline N3 (often known as N3B) might be utilized by Apple both completely or nearly completely, which is TSMC’s largest buyer that’s keen to undertake modern nodes forward of all different firms, regardless of excessive preliminary prices. If this assumption is appropriate and Apple is certainly the first buyer to make use of baseline N3, then it’s noteworthy that TSMC mentions each smartphone and HPC (a obscure time period that TSMC makes use of to explain nearly all ASICs, CPUs, GPUs, SoCs, and FPGAs not aimed toward automotive, communications, and smartphones) functions along with N3 in 2023. 

N3E Coming within the Second Half

One of many explanation why many firms are ready for TSMC’s relaxed N3E know-how (which is getting into HVM within the second half of 2023, in accordance with TSMC) is the upper efficiency and energy enhancements, in addition to much more aggressive logic scaling. One other is that the method will provide decrease prices, albeit at the price of a lack of SRAM scaling compared to N5, in accordance with analysts from China Renaissance.

“N3E, with six fewer EUV layers than the baseline N3, guarantees less complicated course of complexity, intrinsic value and manufacturing cycle time, albeit with much less density achieve,” Szeho Ng, an analyst with China Renaissance, wrote in a word to shoppers this week. 

Marketed PPA Enhancements of New Course of Applied sciences

Information introduced throughout convention calls, occasions, press briefings and press releases




Energy -25-30% -34%
Efficiency +10-15% +18%
Logic Space

Discount* %

Logic Density*







SRAM Cell Measurement 0.0199µm² (-5% vs N5) 0.021µm² (similar as N5)

Late 2022 H2 2023

Ho says that TSMC’s unique N3 options as much as 25 EUV layers and might apply multi-patterning for a few of them for added density. By contract, N3E helps as much as 19 EUV layers and solely makes use of single-patterning EUV, which reduces complexity, but additionally means decrease density.

“Purchasers’ curiosity within the optimized N3E (submit the baseline N3B ramp-up, which is basically restricted to Apple) is excessive, embracing compute-intensive functions in HPC (AMD, Intel), cellular (Qualcomm, Mediatek) and ASICs (Broadcom, Marvell),” wrote Ho.

It appears like N3E will certainly be TSMC’s essential 3nm-class working horse earlier than N3P, N3S, and N3X arrive in a while.

Tens of Billions on N3

Whereas TSMC’s 3nm-class nodes are going to earn the corporate just a little greater than $4 billion in 2023, the corporate will spend tens of billions of {dollars} increasing its fab capability to provide chips on numerous N3 nodes. This yr the corporate’s capital expenditures are guided to be between $32 billion – $36 billion. 70% of that sum might be used on superior course of applied sciences (N7 and beneath), which incorporates N3-capable capability in Taiwan, in addition to gear for Fab 21 in Arizona (N4, N5 nodes). In the meantime 20% might be used for fabs producing chips on specialty applied sciences (which primarily means a wide range of 28nm-class processes), and 10% might be spent on issues like superior packaging and masks manufacturing.

Spending not less than $22 billion on N3 and N5 capability signifies that TSMC is assured on the demand for these nodes. And there’s a good motive for that: the N3 household of course of applied sciences is about to be TSMC’s final FinFET-based household of manufacturing nodes for complicated high-performance chips. The corporate’s N2 (2nm-class) manufacturing process will depend on nanosheet-based gate-all-around field-effect transistors (GAAFETs). The truth is, analyst Szeho Ng from China Renaissance believes {that a} vital share of this yr’s CapEx set for superior applied sciences might be spent on N3 capability, setting the bottom for roll-out of N3E, N3P, N3X, and N3S. Since N3-capable fabs also can produce chips on N5 processes, TSMC will be capable to use this capability the place there might be vital demand for N5-based chips as nicely.

“TSMC guided 2023 CapEx at $32-36bn (2022: US$36.3bn), with its growth centered on N3 in Fab 18 (Tainan),” the analyst wrote in a word to shoppers. 

Since TSMC’s N2 course of know-how will solely ramp beginning in 2026, N3 will certainly be a long-lasting node for the corporate. Moreover, since it will likely be the final FinFET-based node for superior chips, it will likely be used for a few years to come back as not all functions will want GAAFETs.

We will be happy to hear your thoughts

Leave a reply
Enable registration in settings - general
Compare items
  • Total (0)
Shopping cart